Integrating Verification and Validation Techniques Knowledge into Software Engineering Environments
نویسندگان
چکیده
Accomplishing software verification and validation (V&V) activities is not a simple task. It involves a great number of techniques to choose and there is no sufficient organized information to support the selection regarding the V&V technique to be used. This paper describes an ongoing research work concerned with the definition of an approach to plan verification and validation processes. Its objective is to define how V&V activities can be supported throughout software development processes accomplished by a Software Engineering Environment (SEE). Besides V&V knowledge integrated into the SEE, this approach will also organize some practical recommendations generated by experimental studies regarding V&V techniques to support their
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